1. Field of the Invention
The present invention relates to a test simulator, a test simulation program, and a recording medium. More particularly, the present invention relates to a test simulator and a test simulation program simulating a test of a semiconductor device, and a recording medium.
2. Description of Related Art
Now the design of a semiconductor device such as VLSI is conducted by a hardware description language (HDL) such as Verilog-HDL and VHDL by means of a computer. Further, design using such a HDL is verified to confirm whether the function intended by a designer (e.g., behavioral levels or gate levels) is carried out by using a device simulator (Verilog-HDL/VHDL simulator) before the design is manufactured as a silicon IC. For example, a technique for simulating a test of a semiconductor device performed by a semiconductor testing apparatus to verify the design of the semiconductor device by means of a simulator based on HDL is disclosed, for example, in Japanese Patent Application Publication No. 2002-215712.
However, the operating speed of a semiconductor device simulated by such a device simulator is very low compared to the operating speed of a real semiconductor device. Therefore, a test of a semiconductor device simulated by means of a device simulator requires a very long time compared with a test using a real semiconductor testing apparatus and semiconductor device. For this reason, the design automation of a semiconductor device cannot be achieved with high efficiency, and there has been a need for a test simulator that simulates a test efficiently.